stn 4260 n channel enhancement mode mosfet 18 a stanson technology 120 bentley square, mountain view, ca 94040 usa www.stansontech.com copyright ?200 8 , stanson corp. stn 4 260 2 016 . v1 description stn 4260 is the n - channel logic enhancement mode power field effect transistor which is produced using high cell density . this high density process is especially tailored to minimize on - state resistance. these devices are particularly suited fo r low voltage application such as power management and other battery powered circuits where high - side switching . pin configuration sop - 8 part marking y: year code a: porduce code p : process code feature l 6 0v/ 10 a, r ds(on) = 11.5 m (typ.) @v gs = 10v l 6 0v/ 8 a, r ds(on) = 12 .5 m @v gs = 4.5 v l super high density cell design for extremely low r ds(on) l exceptional on - resistance and maximum dc current capability l sop - 8 package design
stn 4260 n channel enhancement mode mosfet 18 a stanson technology 120 bentley square, mountain view, ca 94040 usa www.stansontech.com copyright ?200 8 , stanson corp. stn 4 260 2 016 . v1 absoulte maximum ratings (ta = 25 unless otherwise noted ) parameter symbol typical unit drain - source voltage vdss 6 0 v gate - source voltage vgss ?0 v continuous drain current (tj=150 ) ta=25 ta=70 id 20 14 a pulsed drain current idm 11 0 a continuous source current (diode cond uction) is 4.5 a power dissipation ta=25 ta=70 pd 3.1 2.0 w operation junction temperature tj 150 storgae temperature range tstg - 55/150 thermal resistance - junction to ambient r ja 7 0 /w
stn 4260 n channel enhancement mode mosfet 18 a stanson technology 120 bentley square, mountain view, ca 94040 usa www.stansontech.com copyright ?200 8 , stanson corp. stn 4 260 2 016 . v1 electrical characteristics ( ta = 25 unless otherwise noted ) parameter symbol condition min typ max unit static drain - source breakdown voltage v (br)dss v gs =0v,id= 250ua 6 0 v gate threshold voltage v gs(th) v ds =v gs ,id = 2 50ua 1.0 2 .5 v gate leakage current i gss v ds =0v,v gs =?0v ?00 na zero gate voltage drain current i dss v ds = 60 v,v gs =0v 1 ua v ds = 60 v,v gs =0v t j = 2 5 5 drain - source on - resistance r ds(on) v gs = 10v,i d = 10 a v gs = 4.5 v,i d = 8 a 11.5 12 .5 13 14 m forward transconductance gfs v ds = 10 v,i d = 6 a 11.7 s diode forward voltage v sd i s = 1a ,v gs =0v 0.8 1.0 v dynamic total gate charge q g v ds = 3 0 v,v gs = 10v i d 10 a 4 0 58 nc gate - source charge q gs 6 9 gate - drain charge q gd 8.8 14 input capacitance c iss v ds = 25 v,v gs =0v f =1mhz 21 0 0 pf output capacitance c oss 16 5 reverse transfer c apacitance c rss 80 turn - on time t d(on) tr v d d = 15 v, v gs =10v, r g = 6 i d = 1a 9 .5 18 ns 28 54 turn - off time t d(off) tf 45.3 86 80 120
stn 4260 n channel enhancement mode mosfet 18 a stanson technology 120 bentley square, mountain view, ca 94040 usa www.stansontech.com copyright ?200 8 , stanson corp. stn 4 260 2 016 . v1
stn 4260 n channel enhancement mode mosfet 18 a stanson technology 120 bentley square, mountain view, ca 94040 usa www.stansontech.com copyright ?200 8 , stanson corp. stn 4 260 2 016 . v1
stn 4260 n channel enhancement mode mosfet 18 a stanson technology 120 bentley square, mountain view, ca 94040 usa www.stansontech.com copyright ?200 8 , stanson corp. stn 4 260 2 016 . v1 package outline sop - 8p
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